Field of Invention
Various embodiments of the invention relate generally to an electronic device, and more particularly, to a semiconductor memory device and an operating method thereof.
Description of Related Art
Semiconductor memory devices are generally classified into volatile and nonvolatile memory devices.
Unlike a volatile memory device, a nonvolatile memory device can, maintain data stored therein even when a power supply to the device is interrupted. However, read and write speeds of a nonvolatile memory device are comparatively lower than those of a volatile memory device. Therefore, nonvolatile memory devices may be employed in applications requiring maintaining the stored data regardless of whether or not the power supply is on or off. Examples of a nonvolatile memory device include a read-only memory (ROM), a mask ROM (MROM) a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a flash memory, a phase-change random access memory (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), and a ferroelectric RAM (FRAM). The flash memory may be classified into NOR and a NAND flash memory.
Flash memory combines both the advantages of a RAM in that data is programmable and erasable, and the advantages of a ROM in that data stored therein may be retained even when power is interrupted. Flash memory is widely used as a storage medium for portable electronic devices such as a digital camera, a personal digital assistant (PDA) and MP3.
Flash memory devices may be classified into a two dimensional semiconductor device in which strings are horizontally formed on a semiconductor substrate, and a three-dimensional semiconductor device in which strings are vertically formed on the semiconductor substrate.
The three-dimensional semiconductor device was devised to overcome a limitation in the degree of integration of the two-dimensional semiconductor device and includes a plurality of strings which are vertically formed on a semiconductor substrate. Each string includes a drain select transistor, memory cells and a source select transistor which are coupled in series between a bit line and a source line.